Recently, high-density designing of large-scale integrated circuit (LSI) is used to be achieved by downsizing its chip size. Because the area of wiring and via metal is reduced due to such high-density design, a minimum metal area error has become a significant issue. The minimum metal area error is a phenomenon that, because a metal area of wiring and via holes is smaller than a predetermined threshold value (that is, minimum metal area), exposure cannot be performed, and thus the LSI cannot be manufactured. The minimum metal area is determined as a design rule (design standard) for each semiconductor technology.
As a conventional technique of preventing the minimum metal area error, a technique of checking the length of each wire with reference to a library has been known (see Japanese Laid-open Patent Publication No. 11-135724). Specifically, a library that stores a safe length of a wire for connecting between upper and lower wiring layers through via holes is created in advance (see FIG. 16), and it is checked whether the length of each wire connected through via holes is equal to or larger than values listed in the library (values in the column of “PERMIT” in the example of FIG. 16).
According to the conventional technique, a library needs to be created in advance. Therefore, it takes time and labor to create the library based on a design rule determined for each semiconductor technology to which the design rule is to be applied. Because the length of each wire is simply checked with reference to the library, the entire metal area of an LSI cannot be controlled to a preferable limit, and high density cannot be achieved. Consequently, there has been a problem that the productivity of semiconductors decreases.
Further, according to the technique of preventing a minimum metal area error by the library, the library is updated each time the design rule is changed. Therefore, a calculation error can occur at the time of updating the library, and the minimum metal area error cannot be properly prevented.